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Hermetically Sealed, Low IF, Wide VCC, High Gain Optocouplers Technical Data
6N140A* HCPL-675X 83024 HCPL-570X HCPL-177K
5962-89810 HCPL-573X HCPL-673X 5962-89785 5962-98002
*See matrix for available extensions.
Features
* Dual Marked with Device Part Number and DSCC Drawing Number * Manufactured and Tested on a MIL-PRF-38534 Certified Line * QML-38534, Class H and K * Five Hermetically Sealed Package Configurations * Performance Guaranteed, Over -55C to +125C * Low Input Current Requirement: 0.5 mA * High Current Transfer Ratio: 1500% Typical @ IF = 0.5 mA * Low Output Saturation Voltage: 0.11 V Typical * 1500 Vdc Withstand Test Voltage * High Radiation Immunity * 6N138/9, HCPL-2730/31 Function Compatibility * Reliability Data
* Isolated Input Line Receiver * EIA RS-232-C Line Receiver * Voltage Level Shifting * Isolated Input Line Receiver * Isolated Output Line Driver * Logic Ground Isolation * Harsh Industrial Environments * Current Loop Receiver * System Test Equipment Isolation * Process Control Input/Output Isolation
both lower saturation voltage and higher signaling speed than possible with conventional photoDarlington optocouplers. The shallow depth and small junctions offered by the IC process provides better radiation immunity than conventional photo transistor optocouplers. The supply voltage can be operated as low as 2.0 V without adversely affecting the parametric performance.
Description
These units are single, dual, and quad channel, hermetically sealed optocouplers. The products are capable of operation and storage over the full military temperature range and can be purchased as either standard product or with full MIL-PRF-38534 Class Level H or K testing or from the appropriate DSCC Drawing. All devices are manufactured and tested on a MIL-PRF-38534 certified line and are included in the DSCC Qualified Manufacturers List QML38534 for Hybrid Microcircuits. Each channel contains a GaAsP light emitting diode which is optically coupled to an integrated high gain photon detector. The high gain output stage features an open collector output providing
Truth Table
(Positive Logic) Input On (H) Off (L) Output L H
Functional Diagram
Multiple Channel Devices Available
1 VCC 8
Applications
Military and Space High Reliability Systems Telephone Ring Detection Microprocessor System Interface * Transportation, Medical, and Life Critical Systems * * * *
2 3 4 VOUT
7 6 5
GND
The connection of a 0.1 F bypass capacitor between VCC and GND is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2
These devices have a 300% minimum CTR at an input current of only 0.5 mA making them ideal for use in low input current applications such as MOS, CMOS, low power logic interfaces or line receivers. Compatibility with high voltage CMOS logic systems is assured by specifying ICCH and IOH at 18 Volts. Upon special request, the following device selections can be made: CTR minimum of up to 600% at 0.5 mA, and lower output leakage current levels to 100 A.
Package styles for these parts are 8 and 16 pin DIP through hole (case outlines P and E respectively), 16 pin DIP flat pack (case outline F), and leadless ceramic chip carrier (case outline 2). Devices may be purchased with a variety of lead bend and plating options. See Selection Guide table for details. Standard Military Drawing (SMD) parts are available for each package and lead style. Because the same electrical die (emitters and detectors) are used
for each channel of each device listed in this data sheet, absolute maximum ratings, recommended operating conditions, electrical specifications, and performance characteristics shown in the figures are similar for all parts except as noted. Additionally, the same package assembly processes and materials are used in all devices. These similarities justify the use of a common data base for die related reliability and certain limited radiation test results.
Selection Guide-Package Styles and Lead Configuration Options
Package Lead Style Channels Common Channel Wiring Agilent Part # & Options Commercial MIL-PRF-38534 Class H MIL-PRF-38534 Class K Standard Lead Finish Solder Dipped Butt Cut/Gold Plate Gull Wing/Soldered Crew Cut/Gold Plate Class H SMD Part # Prescript for all below Either Gold or Solder Gold Plate Solder Dipped Butt Cut/Gold Plate Butt Cut/Soldered Gull Wing/Soldered Crew Cut/Gold Plate Crew Cut/Soldered Class K SMD Part # Prescript for all below Either Gold or Solder Gold Plate Solder Dipped Butt Cut/Gold Plate Butt Cut/Soldered Gull Wing/Soldered Crew Cut/Gold Plate Crew Cut/Soldered
*JEDEC registered part.
16 pin DIP Through Hole 4 VCC , GND 6N140A* 6N140A/883B HCPL-177K Gold Plate Option #200 Option #100 Option #300 Option #600 None 8302401EX 8302401EC 8302401EA 8302401YC 8302401YA 8302401XA 8302401ZC 8302401ZA 59629800201KEX 9800201KEC 9800201KEA 9800201KYC 9800201KYA 9800201KXA 9800201KZC 9800201KZA
8 pin DIP Through Hole 1 None HCPL-5700 HCPL-5701 HCPL-570K Gold Plate Option #200 Option #100 Option #300 Option #600 59628981001PX 8981001PC 8981001PA 8981001YC 8981001YA 8981001XA Available Available 59628981002KPX 8981002KPC 8981002KPA 8981002KYC 8981002KYA 8981002KXA Available Available
8 pin DIP Through Hole 2 VCC , GND HCPL-5730 HCPL-5731 HCPL-573K Gold Plate Option #200 Option #100 Option #300 Option #600 59628978501PX 8978501PC 8978501PA 8978501YC 8978501YA 8978501ZA Available Available 59628978503KPX 8978503KPC 8978503KPA 8978503KYC 8978503KYA 8978503KZA Available Available
16 pin Flat Pack Unformed Leads 4 VCC , GND HCPL-6750 HCPL-6751 HCPL-675K Gold Plate
20 Pad LCCC Surface Mount 2 None HCPL-6730 HCPL-6731 HCPL-673K Solder Pads
None 8302401FX 8302401FC
596289785022X 89785022A
59629800201KFX 9800201KFC
59628978504K2X 8978504K2A
3
Functional Diagrams
16 pin DIP Through Hole 4 Channels
1
8 pin DIP Through Hole 1 Channel
VCC 8
8 pin DIP Through Hole 2 Channels
1 VCC VO1 VO2 8
16 pin Flat Pack Unformed Leads 4 Channels
20 Pad LCCC Surface Mount 2 Channels
15 VCC2
1
16
2
1
16
19 20
VO2 GND2 VO1 GND1 VCC1
13 12
7 VOUT 6 5
2 3 4
VCC VO1 VO2 VO3 VO4 GND
15
3
2 3 4
7 6 5
2 3 4
VCC VO1 VO2 VO3 VO4 GND
15
2
14 13
10
14
4
3
13
GND
GND
7
12
8
5
12
5
6 7 8
11 10 9
6 7 8
11 10 9
Note: All DIP and flat pack devices have common VCC and ground. LCCC (leadless ceramic chip carrier) package has isolated channels with separate VCC and ground connections.
Outline Drawings
16 Pin DIP Through Hole, 4 Channels
20.06 (0.790) 20.83 (0.820) 0.89 (0.035) 1.65 (0.065) 4.45 (0.175) MAX. 8.13 (0.320) MAX.
0.51 (0.020) MIN.
3.81 (0.150) MIN.
0.20 (0.008) 0.33 (0.013)
2.29 (0.090) 2.79 (0.110)
0.51 (0.020) MAX.
7.36 (0.290) 7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
Leaded Device Marking
Agilent DESIGNATOR Agilent P/N DSCC SMD* DSCC SMD* PIN ONE/ ESD IDENT A QYYWWZ XXXXXX XXXXXXX XXX XXX 50434 COMPLIANCE INDICATOR,* DATE CODE, SUFFIX (IF NEEDED) COUNTRY OF MFR. Agilent CAGE CODE*
Leadless Device Marking
Agilent DESIGNATOR Agilent P/N PIN ONE/ ESD IDENT COUNTRY OF MFR. A QYYWWZ XXXXXX XXXX XXXXXX XXX 50434 COMPLIANCE INDICATOR,* DATE CODE, SUFFIX (IF NEEDED) DSCC SMD* DSCC SMD* Agilent CAGE CODE*
*
*
*QUALIFIED PARTS ONLY
*QUALIFIED PARTS ONLY
4
Outline Drawings (continued)
16 Pin Flat Pack, 4 Channels
7.24 (0.285) 6.99 (0.275) 2.29 (0.090) MAX.
1.27 (0.050) REF. 11.13 (0.438) 10.72 (0.422)
0.46 (0.018) 0.36 (0.014) 8.13 (0.320) MAX.
2.85 (0.112) MAX.
0.88 (0.0345) MIN. 0.89 (0.035) 0.69 (0.027) 5.23 (0.206) MAX. 9.02 (0.355) 8.76 (0.345)
0.31 (0.012) 0.23 (0.009)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
20 Terminal LCCC Surface Mount, 2 Channels
8.70 (0.342) 9.10 (0.358) 4.95 (0.195) 5.21 (0.205) 1.78 (0.070) 2.03 (0.080) 1.02 (0.040) (3 PLCS) 1.14 (0.045) 1.40 (0.055) 8.70 (0.342) 9.10 (0.358) 4.95 (0.195) 5.21 (0.205) 1.78 (0.070) 2.03 (0.080) 0.64 (0.025) (20 PLCS) 1.52 (0.060) 2.03 (0.080)
8 Pin DIP Through Hole, 1 and 2 Channel
9.40 (0.370) 9.91 (0.390) 0.76 (0.030) 1.27 (0.050) 4.32 (0.170) MAX. 8.13 (0.320) MAX. 7.16 (0.282) 7.57 (0.298)
TERMINAL 1 IDENTIFIER 2.16 (0.085) METALIZED CASTILLATIONS (20 PLCS) 0.51 (0.020)
0.51 (0.020) MIN.
3.81 (0.150) MIN.
0.20 (0.008) 0.33 (0.013)
2.29 (0.090) 2.79 (0.110)
0.51 (0.020) MAX. NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
7.36 (0.290) 7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES). SOLDER THICKNESS 0.127 (0.005) MAX.
5
Hermetic Optocoupler Options
Option 100 Description
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details).
4.32 (0.170) MAX.
0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110)
1.14 (0.045) 1.40 (0.055) 0.51 (0.020) MAX.
4.32 (0.170) MAX.
0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110)
1.14 (0.045) 1.40 (0.055) 0.51 (0.020) MAX. NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
0.20 (0.008) 0.33 (0.013) 7.36 (0.290) 7.87 (0.310)
200
Lead finish is solder dipped rather than gold plated. This option is available on commercial and hi-rel product in 8 and 16 pin DIP. DSCC Drawing part numbers contain provisions for lead finish. All leadless chip carrier devices are delivered with solder dipped terminals as a standard feature. Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). This option has solder dipped leads.
4.57 (0.180) MAX.
300
0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110)
1.40 (0.055) 1.65 (0.065) 0.51 (0.020) MAX.
4.57 (0.180) MAX. 0.20 (0.008) 0.33 (0.013) 9.65 (0.380) 9.91 (0.390)
4.57 (0.180) MAX.
0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110)
1.40 (0.055) 1.65 (0.065) 0.51 (0.020) MAX.
5 MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
600
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). Contact factory for the availability of this option on DSCC part types.
3.81 (0.150) MIN. 0.20 (0.008) 0.33 (0.013) 2.29 (0.090) 2.79 (0.110) 1.14 (0.045) 1.25 (0.049) 7.36 (0.290) 7.87 (0.310)
3.81 (0.150) MAX.
0.51 (0.020) MIN.
0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110)
1.02 (0.040) TYP.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
6
Absolute Maximum Ratings
Storage Temperature Range, TS .................................. -65C to +150C Operating Temperature, TA ......................................... -55C to +125C Case Temperature, TC ............................................................... +170C Junction Temperature, TJ ......................................................... +175C Lead Solder Temperature ................................................ 260C for 10s Output Current, IO (Each Channel).............................................. 40 mA Output Voltage, VO (Each Channel) ................................. -0.5 to 20 V[1] Supply Voltage, VCC .......................................................... -0.5 to 20 V[1] Output Power Dissipation (Each Channel) ............................. 50 mW[2] Peak Input Current (Each Channel, <1 ms Duration) ................. 20 mA Average Input Current, IF (Each Channel) ............................... 10 mA[3] Reverse Input Voltage, VR (Each Channel) ......................................... 5V Package Power Dissipation, PD (each channel) ........................ 200 mW
8 Pin Ceramic DIP Single Channel Schematic
2 + IF VCC 8 ICC
ANODE
VF CATHODE - 3 IO 6 VO
5
GND
ESD Classification
(MIL-STD-883, Method 3015) HCPL-5700/01/0K and 6730/31/3K .................................. (), Class 2 6N140A, 6N140A/883B, HCPL-177K, HCPL-6750/51/5K and HCPL-5730/31/3K ................ (Dot), Class 3
Recommended Operating Conditions
Parameter Input Voltage, Low Level (Each Channel) Input Current, High Level (Each Channel) Supply Voltage Output Voltage Symbol VF(OFF) IF(ON) VCC VO Min. 0.5 2.0 2.0 Max. 0.8 5 18 18 Units V mA V V
7
Electrical Characteristics, TA = -55C to +125C, unless otherwise specified
Symbol CTR* Group A[13] SubGroup 1, 2, 3
Limits
Min. Typ.** Max. Units Fig. Note 300 1500 % 3 4, 5 300 200 1000 500 0.11 0.13 0.16 0.4 0.4 0.4 250 250 2 4 4 20 40 40 A 15 A A mA 4 V 2 4 4, 16 4 4 4, 6 15
Parameter Current Transfer Ratio
Logic Low Output Voltage
VOL
Logic High Output Current Logic Single Channel Low and LCCC Supply Dual Channel Current Quad Channel
IOH* IOHX ICCL*
Test Conditions IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V IF = 5 mA, VO = 0.4 V, VCC = 4.5 V IF = 0.5 mA, IOL = 1.5 mA, VCC = 4.5 V IF = 1.6 mA, IOL = 4.8 mA, VCC = 4.5 V IF = 5 mA, IOL = 10 mA, VCC = 4.5 V IF = 2 A, VO = 18 V, VCC = 18 V IF = 1.6 mA, VCC = 18 V IF1 = IF2 = 1.6 mA, VCC = 18 V
IF1 =IF2 = IF3 = IF4 = 1.6 mA
1, 2, 3
1, 2, 3 1, 2, 3
0.001 1.0 1.0 1.7
Logic Single Channel ICCH* High and LCCC Supply Dual Channel Current Quad Channel Input Single and Forward Dual Channel Voltage LCCC Quad Channel Input Reverse Breakdown Voltage Input-Output Insulation Leakage Current Capacitance Between Input-Output BVR* II-O* VF*
VCC = 18 V IF = 0 mA, VCC = 18 V IF1 = IF2 = 0 mA, VCC = 18 V IF1 = IF2 = IF3 = IF4 = 0 mA VCC = 18 V IF = 1.6 mA
1, 2, 3
0.001
IR = 10 A 45% Relative Humidity TA = 25C, t = 5 s, VI-O = 1500 VDC f = 1 MHz, TA = 25C
1 2 3 1, 2, 3 1, 2 3 1, 2, 3 1
1.0
1.4
1.0
1.4 1.4
1.7 1.7 1.8 1.8 1.7 1.8
V
1
4
5 1.0
V A
4 7, 12
CI-O
4
4
pF
4, 8 14, 17
*For JEDEC registered parts. **All typical values are at VCC = 5 V, TA = 25C.
8
Electrical Characteristics (cont) TA = -55C to +125C, unless otherwise specified
Symbol tPHL* tPHL tPHL* Group A[13] Limits SubGroup Min. Typ.** Max. Units Fig. Note 9, 10, 11 30 100 s 5, 6, 4 7, 8 9, 10, 11 5 30 4, 16 9 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9 10, 11 9, 10, 11 9, 10, 11 2 5 10 10 60 50 20 30 30 V/s 9 4, 10 11, 14 500 1000 V/s 9 4, 10 11, 14 4, 17 4, 16 4 4, 16 4, 17 4, 16
Parameter Propagation Delay Time to Logic Low
at Output
Test Conditions IF = 0.5 mA, RL = 4.7 k, VCC = 5 V IF = 1.6 mA, RL = 1.5 k, VCC = 5 V IF = 5 mA, RL = 680 , VCC = 5 V IF = 0.5 mA, RL = 4.7 k, VCC = 5 V IF = 1.6 mA, RL = 1.5 k, VCC = 5 V IF = 5 mA, RL = 680 , VCC = 5 V |V | = CM |VCM| = 25 VP-P[17] 50 VP-P[16]
Propagation Delay Time to Logic High
tPLH* tPLH tPLH*
17 14 8
s
5, 6, 7, 8
at Output
Common Mode Transient Immunity at Low Output Level Common Mode Transient Immunity at High Output Level
|CML| VCC = 5 V, IF = 1.6 mA RL = 1.5 k |CMH| VCC = 5 V, IF = 0 mA RL = 1.5 k
500
1000
|V | = 25 VP-P[17] 9, 10, 11 CM |VCM| = 50 VP-P[16]
*For JEDEC registered parts. **All typical values are at VCC = 5 V, TA = 25C.
Typical Characteristics, TA = 25C, VCC = 5V
Parameter Input Capacitance Input Diode Temperature Coefficient Resistance (Input-Output) Capacitance (Input-Output) Sym. CIN VF /TA RI-O CI-O Typ. 60 -1.8 1012 2.0 Units pF mV/C pF Test Conditions VF = 0V, f = 1 MHz IF = 1.6 mA VI-O = 500 V f = 1MHz Note 4 4 4, 8 4, 8
Dual and Quad Channel Product Only Input-Input Leakage Current II-I Resistance (Input-Input) Capacitance (Input-Input) RI-I C I-I
0.5 1012 1.0
nA pF
Relative Humidity = 45%, VI-I = 500 V, t = 5 s VI-I = 500 V f = 1 MHz
9 9 9
9
Notes: 1. GND Pin should be the most negative voltage at the detector side. Keeping VCC as low as possible, but greater than 2.0 V, will provide lowest total IOH over temperature. 2. Output power is collector output power plus total supply power for the single channel device. For the dual channel device, output power is collector output power plus one half the total supply power. For the quad channel device, output power is collector output power plus one fourth of total supply power. Derate at 1.66 mW/C above 110C. 3. Derate IF at 0.33 mA/C above 110C. 4. Each channel. 5. CURRENT TRANSFER RATIO is defined as the ratio of output collector current, I O, to the forward LED input current, IF , times 100%. 6. IOHX is the leakage current resulting from channel to channel optical crosstalk. IF = 2 A for channel under test. For all other channels, I F = 10 mA. 7. All devices are considered twoterminal devices; measured between all input leads or terminals shorted together and all output leads or terminals shorted together.
8. Measured between each input pair shorted together and all output connections for that channel shorted together. 9. Measured between adjacent input pairs shorted together for each multichannel device. 10. CML is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (VO < 0.8 V). CMH is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic high state (VO > 2.0 V). 11. In applications where dV/dt may exceed 50,000 V/s (such as a static discharge) a series resistor, R CC, should be included to protect the detector ICs from destructively high surge currents. The recommended value is: 1 (V) R CC = ----------- k 0.15 IF (mA) for single channel; 1 (V) R CC = ----------- k 0.3 IF (mA) for dual channel; 1 (V) R CC = ----------- k 0.6 IF (mA) for quad channel.
12. This is a momentary withstand test, not an operating condition. 13. Standard parts receive 100% testing at 25C (Subgroups 1 and 9). SMD and 883B parts receive 100% testing at 25,125, and -55C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively). 14. Parameters tested as part of device initial characterization and after design and process changes. Parameters guaranteed to limits specified for all lots not specifically tested. 15. The HCPL-6730, HCPL-6731, and HCPL-673K dual channel parts function as two independent single channel units. Use the single channel parameter limits. 16. Not required for 6N140A, 6N140A/ 883B, HCPL-177K, HCPL-6750/51/ 5K, 8302401, and 5962-9800201 types. 17. Required for 6N140A, 6N140A/883B, HCPL-177K, HCPL-6750/51/5K, 8302401, and 5962-9800201 types.
10
Figure 1. Input Diode Forward Current vs. Forward Voltage.
Figure 2. Normalized DC Transfer Characteristics.
Figure 3. Normalized Current Transfer Ratio vs. Input Diode Forward Current.
Figure 4. Normalized Supply Current vs. Input Diode Forward Current.
Figure 5. Propagation Delay to Logic Low vs. Input Pulse Period.
Figure 6. Propagation Delay vs. Temperature.
Figure 7. Propagation Delay vs. Input Diode Forward Current.
11
PULSE GEN. ZO = 50 tr, tf = 50 ns f = 100 Hz tPULSE = 0.5ms
IF
B
D.U.T. VCC
RCC*
56 +5 V 1.0 F RL VO
IF
D.U.T. VCC
RCC*
56 +5 V 1.0 F RL VO
VFF A
IF MONITOR Rm GND
CL**
+
GND VCM -
PULSE GEN.
* SEE NOTE 11 ** CLINCLUDES PROBE AND STRAY WIRING CAPACITANCE.
* SEE NOTE 11
Figure 8. Switching Test Circuit (f, tP not JEDEC registered).
Figure 9. Test Circuit for Transient Immunity and Typical Waveforms.
VCC
R1 ILEAK R2
D.U.T. VCC
R2 >
2.4 - VF IF
VO
V - VF - IF R2 R1 < CC IF + ILEAK GND
R2 MAY BE OMITTED IF ADDITIONAL FANOUT IS NOT USED.
Figure 10. Recommended Drive Circuitry Using TTL Open-Collector Logic.
MIL-PRF-38534 Class H, Class K, and DSCC SMD Test Program
Agilent's Hi-Rel Optocouplers are in compliance with MIL-PRF38534 Class H and K. Class H and Class K devices are also in compliance with DSCC drawings 83024, 5962-89785, 596289810, and 5962-98002. Testing consists of 100% screening and quality conformance inspection to MIL-PRF-38534.
VCC + 18 V D.U.T.* VCC (EACH INPUT) + VIN - VO GND (EACH OUTPUT) 0.01 F VOC
CONDITIONS: IF = 10 mA IO = 40 mA TA = +125 C * ALL CHANNELS TESTED SIMULTANEOUSLY.
Figure 11. Operating Circuit for Burn-In and Steady State Life Tests.
www.semiconductor.agilent.com Data subject to change. Copyright (c) 1999 Agilent Technologies Obsoletes 5968-0554E 5968-9400E (10/00)

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